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Copper (Cu) interconnects are an increasingly important bottleneck in integrated circuits due to energy consumption and latency caused by the notable increase in Cu resistivity as dimensions decrease, primarily due to electron scattering at surfaces. Herein, the potential of a directional conductor, PtCoO₂, which has a low bulk resistivity and a distinctive anisotropic structure that mitigates electron surface scattering is showcased. Thin films of PtCoO₂of various thicknesses are synthesized by molecular beam epitaxy (MBE) coupled with a postdeposition annealing process and the superior quality of PtCoO₂films is demonstrated by multiple characterization techniques. The thickness‐dependent resistivity curve illustrates that PtCoO₂significantly outperforms effective Cu (Cu with TaN barriers) and Ru in resistivity below 20.0 nm with a more than 6x reduction compared to effective Cu below 6.0 nm, having a value of only 6.32 μΩ cm at 3.3 nm. It is determined that grain boundary scattering can still be improved for even lower resistivities in this material system through a combination of experiments and theoretical simulations. PtCoO₂is therefore a highly promising alternative material for future interconnect technologies promising lower resistivities, better stability, and significant improvements in energy efficiency and latency for advanced integrated circuits. 

Interconnect materials play the critical role of routing energy and information in integrated circuits. However, established bulk conductors, such as copper, perform poorly when scaled down beyond 10 nm, limiting the scalability of logic devices. Here, a multi‐objective search is developed, combined with first‐principles calculations, to rapidly screen over 15,000 materials and discover new interconnect candidates. This approach simultaneously optimizes the bulk electronic conductivity, surface scattering time, and chemical stability using physically motivated surrogate properties accessible from materials databases. Promising local interconnects are identified that have the potential to outperform ruthenium, the current state‐of‐the‐art post‐Cu material, and also semi‐global interconnects with potentially large skin depths at the GHz operation frequency. The approach is validated on one of the identified candidates, CoPt, using both ab initio and experimental transport studies, showcasing its potential to supplant Ru and Cu for future local interconnects. 

To support the ever-growing demand for faster, energy-efficient computation, more aggressive scaling of the transistor is required. Two-dimensional (2D) transition metal dichalcogenides (TMDs), with their ultra-thin body, excellent electrostatic gate control, and absence of surface dangling bonds, allow for extreme scaling of the channel region without compromising the mobility. New device geometries, such as stacked nanosheets with multiple parallel channels for carrier flow, can facilitate higher drive currents to enable ultra-fast switches, and TMDs are an ideal candidate for that type of next generation front-end-of-line field effect transistor (FET). TMDs are also promising for monolithic 3D (M3D) integrated back-end-of-line FETs due to their ability to be grown at low temperature and with less regard to lattice matching through van der Waals (vdW) epitaxy. To achieve TMD FETs with superior performance, two important challenges must be addressed: (1) complementary n- and p-type FETs with small and reliable threshold voltages are required for the reduction of dynamic and static power consumption per logic operation, and (2) contact resistance must be reduced significantly. We present here the underlying strengths and weaknesses of the wide variety of methods under investigation to provide scalable, stable, and controllable doping. It is our Perspective that of all the available doping methods, substitutional doping offers the ultimate solution for TMD-based transistors. 

Abstract Near-perfect light absorbers (NPLAs), with absorbance,$${{{{{{{\mathcal{A}}}}}}}}$$ $A$, of at least 99%, have a wide range of applications ranging from energy and sensing devices to stealth technologies and secure communications. Previous work on NPLAs has mainly relied upon plasmonic structures or patterned metasurfaces, which require complex nanolithography, limiting their practical applications, particularly for large-area platforms. Here, we use the exceptional band nesting effect in TMDs, combined with a Salisbury screen geometry, to demonstrate NPLAs using only two or three uniform atomic layers of transition metal dichalcogenides (TMDs). The key innovation in our design, verified using theoretical calculations, is to stack monolayer TMDs in such a way as to minimize their interlayer coupling, thus preserving their strong band nesting properties. We experimentally demonstrate two feasible routes to controlling the interlayer coupling: twisted TMD bi-layers and TMD/buffer layer/TMD tri-layer heterostructures. Using these approaches, we demonstrate room-temperature values of$${{{{{{{\mathcal{A}}}}}}}}$$ $A$=95% atλ=2.8 eV with theoretically predicted values as high as 99%. Moreover, the chemical variety of TMDs allows us to design NPLAs covering the entire visible range, paving the way for efficient atomically-thin optoelectronics. 

Topological insulators open many avenues for designing future electronic devices. Using the Bardeen transfer Hamiltonian method, we calculate the current density of electron tunneling between two slabs of Bi2Se3. 3D TI tunnel diode current-voltage characteristics are calculated for different doping concentrations, tunnel barrier height and thickness, and 3D TI bandgap. The difference in the Fermi levels of the slabs determines the peak and trough voltages. The tunnel barrier width and height affect the magnitude of the current without affecting the shape of the current-voltage characteristics. The bandgap of the 3D TI determines the magnitude of the tunnel current, albeit at a lesser rate than the tunnel barrier potential, thus the device characteristics are robust under changing TI material. The high peak-to-trough ratio of 3D TI tunnel diodes, the controllabilty of the trough current location, and the simple construction provide advantages over other NDR devices. 

Keynote presentation for the NSF Future of Semiconductors workshop.